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ROHM's Selection Operational Amplifier/Comparator Series
High Voltage Operation CMOS Operational Amplifiers:Input/Output Full Swing
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM,BD7542F/FVM,BD7542SF/FVM
No.09049EAT05
Description High voltage operable CMOS Op-Amp BD7561/BD7541 family and BD7562/BD7542 family Integrate one or two independent input-output fullswing Op-amps and phase compesation capacitorson a single chip. Especially, characteristics are wide operating voltagerange of +5[V]+14.5[V](single power supply),low supply current and little input bias current.
High speed Single Dual Low power Single Dual
(BD7561SG Operation guaranteed up t o + 105)
(BD7562SF/FVM Operation guaranteed up to + 105)
(BD7541SG
Operation guaranteed up to + 105)
(BD7542SF/FVM Operation guaranteed up to + 105)
Features 1) Wide operating supply voltage(5[V]14.5[V]) 2) 5[V]14.5[V](single supply) 2.5[V]7.25[V](split supply) 3) Input and Output full swing 4) Internal phase compensation 5) High slew rate (BD7561 family, BD7562 family) 6) Low supply current (BD7541 family, BD7542 family) 7) High large signal voltage gain 8) Internal ESD protection Human body model (HBM) 4000[V](Typ.) 9) Wide temperature range -40[]85[] (BD7561G,BD7562 family, BD7541G,BD7542 family) -40[]105[] (BD7561SG,BD7562S family, BD7541SG,BD7542S family) Pin Assignment
IN+ 1 VSS 2 IN- 3 + -
5
VDD
OUT1 1 IN1- 2 IN1+ 3 -+ +CH2 CH1
8 VDD 7 OUT2 6 IN25 IN2+
4
OUT
VSS 4
SSOP5 BD7561G BD7561SG BD7541G BD7541SG
SOP8 BD7562F BD7562SF BD7542F BD7542SF
MSOP8 BD7562FVM BD7562SFVM BD7542FVM BD7542SFVM
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1/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM Absolute Maximum Ratings (Ta=25[]) Rating Parameter Supply Voltage Differential Input Voltage(*1) Input Common-mode Voltage Range Operating Temperature Storage Temperature Maximum Junction Temperature Symbol VDD-VSS Vid Vicm Topr Tstg Tjmax -4085 -55125 125 BD7561GBD7562 F/FVM BD7541GBD7542 F/FVM
Technical Note
BD7561SG BD7562S F/FVM BD7541SG BD7542S F/FVM
Unit V V V
15.5 VDD-VSS (VSS-0.3)(VDD0.3) -40105
Note: Absolute maximum rating item indicates the condition which must not be exceeded. Application of voltage in excess of absolute maximum rating or use out absoluted maximum rated temperature environment may cause deterioration of characteristics. (*1) The voltage difference between inverting input and non-inverting input is the differential input voltage. Then input terminal voltage is set to more then VSS.
Electric Characteristics BD7561 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[]) Guaranteed limit Temperature BD7561G,BD7561SG Parameter Symbol range Min. Typ. Max. 25 1 9 Input Offset Voltage (*2)(*4) Vio Full range 10 Input Offset Current (*2) Iio 25 1 Input Bias Current (*2) Ib 25 1 25 370 550 Full range 600 Supply Current (*4) IDD 25 440 650 Full range 700 High Level Output Voltage VOH 25 VDD-0.1 Low Level Output Voltage VOL 25 VSS+0.1 Large Single Voltage Gain AV 25 70 95 Input Common-mode Voltage Range Vicm 25 0 12 Common-mode Rejection Ratio CMRR 25 45 60 Power Supply Rejection Ratio PSRR 25 60 80 Output Source Current (*3) IOH 25 3 8 Output Sink Current (*3) IOL 25 4 14 Slew Rate SR 25 0.9 Gain Bandwidth Product FT 25 1.0 Phase Margin 25 50 Total Harmonic Distortion THD 25 0.05 (*2) (*3) (*4)
Unit
Condition
mV VDD=514.5[V],VOUT=VDD/2 pA pA A V V dB V dB dB mA mA V/s MHz % RL= All Op-Amps AV=0[dB],VDD=5[V],VIN=2.5[V] RL= All Op-Amps AV=0[dB],VDD=12[V],VIN=6.0[V] RL=10[k] RL=10[k] RL=10[k] VDD-VSS=12[V] VDD-0.4[V] VSS+0.4[V] CL=25[pF] CL=25[pF], AV=40[dB] CL=25[pF], AV=40[dB] VOUT=1[Vp-p],f=1[kHz]
Absolute value Under the high temperature environment, consider the power dissipation of IC when selecting the output current. When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC. Full rangeBD7561Ta=-40[]+85[] BD7561STa=-40[]+105[]
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2/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7562 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[]) Guaranteed limit BD7562F/FVM Temperature Parameter Symbol BD7562SF/FVM range Min. Typ. Max. 25 1 9 (*2)(*4) Input Offset Voltage Vio Full range 10 Input Offset Current (*2) Iio 25 1 Input Bias Current (*2) Ib 25 1 25 750 1300 Full range 1500 (*4) Supply Current IDD 25 900 1400 Full range 1600 High Level Output Voltage VOH 25 VDD-0.1 Low Level Output Voltage VOL 25 VSS+0.1 Large Single Voltage Gain AV 25 70 95 Input Common-mode Voltage Range Vicm 25 0 12 Common-mode Rejection Ratio CMRR 25 45 60 Power Supply Rejection Ratio PSRR 25 60 80 Output Source Current (*3) IOH 25 3 8 Output Sink Current (*3) IOL 25 4 14 Slew Rate SR 25 0.9 Gain Bandwidth Product FT 25 1.0 Phase Margin 25 50 Total Harmonic Distortion THD 25 0.05 (*2) (*3) (*4)
Technical Note
Unit
Condition
mV VDD=514.5[V],VOUT=VDD/2 pA pA A V V dB V dB dB mA mA V/s MHz % RL= All Op-Amps AV=0[dB],VDD=5[V],VIN=2.5[V] RL= All Op-Amps AV=0[dB],VDD=12[V],VIN=6.0[V] RL=10[k] RL=10[k] RL=10[k] VDD-VSS=12[V] VDD-0.4[V] VSS+0.4[V] CL=25[pF] CL=25[pF], AV=40[dB] CL=25[pF], AV=40[dB] VOUT=1[Vp-p],f=1[kHz]
Absolute value Under the high temperature environment, consider the power dissipation of IC when selecting the output current. When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC. Full range BD7562Ta=-40[]+85[] BD7562STa=-40[]+105[]
BD7541 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[]) Guaranteed limit Temperature BD7541G,BD7541SG Parameter Symbol range Min. Typ. Max. 25 1 9 Input Offset Voltage (*5)(*7) Vio Full range 10 Input Offset Current (*5) Iio 25 1 Input Bias Current (*5) Ib 25 1 25 Full range 25 Full range 25 VDD-0.1 25 25 70 25 0 25 45 25 60 25 2 25 3 25 25 25 25 170 180 95 60 80 4 7 0.3 0.6 50 1 300 400 320 420 VSS+0.1 12 9
Unit
Condition
mV VDD=514.5[V],VOUT=VDD/2 pA pA RL= All Op-Amps AV=0[dB],VDD=5[V],VIN=2.5[V] RL= All Op-Amps AV=0[dB],VDD=12[V],VIN=6.0[V] RL=10[k] RL=10[k] RL=10[k] VDD-VSS=12[V] VDD-0.4[V] VSS+0.4[V] CL=25[pF] CL=25[pF], AV=40[dB] CL=25[pF], AV=40[dB] VOUT=1[Vp-p],f=1[kHz]
Supply Current
(*7)
IDD VOH VOL AV Vicm CMRR PSRR IOH IOL SR FT THD
A V V dB V dB dB mA mA V/s MHz %
High Level Output Voltage Low Level Output Voltage Large Single Voltage Gain Input Common-mode Voltage Range Common-mode Rejection Ratio Power Supply Rejection Ratio Output Source Current (*6) Output Sink Current (*6) Slew Rate Gain Bandwidth Product Phase Margin Total Harmonic Distortion
(*5) (*6) (*7)
Absolute value Under the high temperature environment, consider the power dissipation of IC when selecting the output current. When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC. Full rangeBD7541Ta=-40[]+85[] BD7541STa=-40[]+105[]
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3/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7542 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[]) Guaranteed limit Temperature BD7542 F/FVM Parameter Symbol BD7542S F/FVM range Min. Typ. Max. 25 1 9 (*5)(*7) Input Offset Voltage Vio Full range 10 Input Offset Current (*5) Iio 25 1 Input Bias Current (*5) Ib 25 1 25 Full range 25 Full range 25 VDD-0.1 25 25 70 25 0 25 45 25 60 25 2 25 3 25 25 25 25 340 400 95 60 80 4 7 0.3 0.6 50 0.05 650 850 780 900 VSS+0.1 12 -
Technical Note
Unit
Condition
mV VDD=514.5[V],VOUT=VDD/2 pA pA RL= All Op-Amps AV=0[dB],VDD=5[V],VIN=2.5[V] RL= All Op-Amps AV=0[dB],VDD=12[V],VIN=6.0[V] RL=10[k] RL=10[k] RL=10[k] VDD-VSS=12[V] VDD-0.4[V] VSS+0.4[V] CL=25[pF] CL=25[pF], AV=40[dB] CL=25[pF], AV=40[dB] VOUT=1[Vp-p],f=1[kHz]
Supply Current
(*7)
IDD VOH VOL AV Vicm CMRR PSRR IOH IOL SR FT THD
A V V dB V dB dB mA mA V/s MHz %
High Level Output Voltage Low Level Output Voltage Large Single Voltage Gain Input Common-mode Voltage Range Common-mode Rejection Ratio Power Supply Rejection Ratio Output Source Current (*6) Output Sink Current (*6) Slew Rate Gain Bandwidth Product Phase Margin Total Harmonic Distortion
(*5) (*6) (*7)
Absolute value Under the high temperature environment, consider the power dissipation of IC when selecting the output current. When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC. Full rangeBD7542Ta=-40[]+85[] BD7542STa=-40[]+105[]
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4/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM Example of electrical characteristics BD7561 family BD7561 family
800 POWER DISSIPATION [mW] POWER DISSIPATION [mW]
Technical Note
800
BD7561 family
800
BD7561 family
SUPPLY CURRENT [A] SUPPLY CURRENT [uA]
600
BD7561G
600
BD7561SG
600
25
-40
400
400
400
200
200
200
85 105
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 4 8 12 16 SUPPLY VOLTAGE [V]
Fig. 1 Derating Curve
BD7561 family
Fig. 2 Derating Curve
BD7561 family
Fig. 3 Supply Current - Supply Voltage
BD7561 family
800 SUPPLY CURRENT [uA]
14.5V
16 OUTPUT VOLTAGE HIGH [V]
-40
16 OUTPUT VOLTAGE HIGH [V]
600
12
85 25
12
14.5V
400
12V 5V
12V
8
105
8
5V
200
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
4 4 8 12 16 SUPPLY VOLTAGE [V]
4 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
Fig. 4 Supply Current - Ambient Temperature
BD7561 family
Fig. 5 Output Voltage High - Supply Voltage
(RL=10[k])
BD7561 family
Fig. 6 Output Voltage High - Ambient Temperature
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 80
-40 BD7561 family
40 OUTPUT VOLTAGE LOW [mV]
40 OUTPUT VOLTAGE LOW [mV]
30
105 85
30
14.5V
60
20
20
40
25
10
25 -40
10
5V
12V
20
85 105
0 4 8 12 16 SUPPLY VOLTAGE [V]
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 8 9 10 11 12 13 OUTPUT VOLTAGE [V]
Fig. 7 Output Voltage Low - Supply Voltage
(RL=10[k])
BD7561 family
Fig. 8 Output Voltage Low - Ambient Temperature
(RL=10[k])
BD7561 family
Fig. 9 Output Source Current - Output Voltage
(VDD=12[V])
BD7561 family
OUTPUT SOURCE CURRENT [mA]
15 OUTPUT SINK CURRENT [mA] 12 9 6 3
5V 12V 14.5V
100 80
-40
40 OUTPUT SINK CURRENT [mA]
30
14.5V
60
25
20
12V
40
105
20 0
10
5V
85
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 -1 0 1 2 3 -60 -30 0 30 60 90 120 OUTPUT VOLTAGE [V] AMBIENT TEMPERATURE [C]
(VDD=12[V]) ()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[]
Fig. 10 Output Source Current - Ambient Temperature(VOUT=VDD-0.4[V])
Fig. 11 Output Sink Current - Output Voltage
Fig. 12 Output Sink Current - Ambient Temperature
(VOUT=VDD-11.6[V])
BD7561S-40[]+105[]
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5/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7561 family
10.0 INPUT OFFSET VOLTAGE [mV] 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 4 8 12 16 SUPPLY VOLTAGE [V]
85 105 -40 25
Technical Note
BD7561 family BD7561 family
BD7561 family
INPUT OFFSET VOLTAGE [mV]
7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
5V 14.5V 12V
INPUT OFFSET VOLTAGE [mV]
10.0
15 10 5 0 -5 -10 -15
85
-40
25
105
-1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 INPUT VOLTAGE [V]
Fig. 13 Input Offset Voltage - Supply Voltage
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB] 160 140
85 BD7561 family
Fig. 14 Input Offset Voltage - Ambient Temperature
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB]
COMMON MODE REJECTION RATIO [dB]
BD7561 family
Fig. 15 Input Offset Voltage - Input Voltage
(VDD=12[V])
120 100 80 60 40 20 0 4 8 12 16 SUPPLY VOLTAGE [V]
85 105 25 -40 BD7561 family
160 140
12V
14.5V
105
120 100 80 60 4 8 12 16 SUPPLY VOLTAGE [V]
25
120 100 80 60 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
5V
-40
Fig. 16 Large Signal Voltage Gain - Supply Voltage
COMMON MODE REJECTION RATIO [dB] POWER SUPPLY REJECTION RATIO [dB]
Fig. 17 Large Signal Voltage Gain - Ambient Temperature
120 100 80 60 40 20 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
BD7561 family
Fig. 18 Common Mode Rejection Ratio - Supply Voltage
(VDD=12[V])
4 SLEW RATE L-H [V/us]
BD7561 family
120 100 80 60 40 20 0 -60 -30 0 30 60
14.5V 5V
BD7561 family
3
14.5V
12V
2
1
12V 5V
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
90
120
AMBIENT TEMPERATURE [C]
Fig. 19 Common Mode Rejection Ratio - Ambient Temperature
(VDD=12[V])
2.0 SLEW RATE H-L [V/us] SLEW RATEH-L [V/]
BD7561 family
Fig. 20 Power Supply Rejection Ratio - Ambient Temperature
100
Phase
BD7561 family
Fig. 21 Slew Rate L-H - Ambient Temperature
200
1.5 GAIN [dB]
14.5V
80 60 40 20 0 -60 -30 0 30 60 90 120 1.E+00 1.E+02 AMBIENT TEMPERATURE [C] FREQUENCY [Hz]
Gain
150 PHASE (deg) PHASE[deg]
1.0
100
0.5
12V
50
5V
0.0
0 1.E+04 1.E+06 1.E+08
Fig. 22 Slew Rate H-L - Ambient Temperature
Fig. 23 Gain - Frequency
BD7561S-40[]+105[]
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[]
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6/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7562 family
800 POWER DISSIPATION [mW]
Technical Note
BD7562 family
BD7562 family
800 POWER DISSIPATION [mW]
1200 SUPPLY CURRENT [uA] SUPPLY CURRENT [A] 1000
25
BD7562 family -40
600
BD7562F BD7562FVM
600
BD7562SF BD7562SFVM
800 600 400 200 0
85 105
400
400
200
200
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 0 50 100 150 AMBIENT TEMPERATURE [C]
4
8
12
16
SUPPLY VOLTAGE [V]
Fig. 24 Derating Curve
BD7562 family
Fig. 25 Derating Curve
BD7562 family
Fig. 26 Supply Current - Supply Voltage
BD7562 family
1200 SUPPLY CURRENT [A] SUPPLY CURRENT [uA] 1000 800 600
12V
16 OUTPUT VOLTAGE HIGH [V]
-40
16 OUTPUT VOLTAGE HIGH [V]
14.5V
12
85 25
12
14.5V
12V
400 200 0 -60 -30 0 30 60
5V
8
105
8
5V
4 90 120 4 8 12 16 AMBIENT TEMPERATURE [C] SUPPLY VOLTAGE [V]
4 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
Fig. 27 Supply Current - Ambient Temperature
BD7562 family
Fig. 28 Output Voltage High - Supply Voltage
(RL=10[k])
BD7562 family
Fig. 29 Output Voltage High - Ambient Temperature
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 80
BD7562 family
40 OUTPUT VOLTAGE LOW [mV]
40 OUTPUT VOLTAGE LOW [mV]
30
105 85
30
14.5V
60
-40
20
20
40
25
10
25 -40
10
5V
12V
20
85 105
0 4 8 12 16 SUPPLY VOLTAGE [V]
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 8 9
10
11
12
13
OUTPUT VOLTAGE [V]
Fig. 30 Output Voltage Low - Supply Voltage
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 15 12 9 6 3
5V 12V BD7562 family
Fig. 31 Output Voltage Low - Ambient Temperature
(RL=10[k])
100 OUTPUT SINK CURRENT [mA] 80
-40 BD7562 family
Fig. 32 Output Source Current - Output Voltage
(VDD=12[V])
40 OUTPUT SINK CURRENT [mA]
BD7562 family
14.5V
30
14.5V
60 40 20 0
25
20
105 85
10
12V
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 -1 0 1 2 3 -60 -30 0 OUTPUT VOLTAGE [V]
5V
30
60
90
120
AMBIENT TEMPERATURE [C]
Fig. 33 Output Source Current - Ambient Temperature
Fig. 34 Output Sink Current - Output Voltage
(VDD=12[V])
Fig. 35 Output Sink Current - Ambient Temperature
(VOUT=VDD-11.6[V])
()The above data is ability value of sample, it is not guaranteed. BD7562-40[]+85[]
BD7562S-40[]+105[]
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7/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7562 family
INPUT OFFSET VOLTAGE [mV] INPUT OFFSET VOLTAGE [mV] INPUT OFFSET VOLTAGE [mV] 10.0 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 4 8 12 16 SUPPLY VOLTAGE [V]
85 105 -40 25 BD7562 family
Technical Note
10.0 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 -60 -30 0 30 60
5V 14.5V
BD7562 family
15 10 5 0 -5 -10 -15
85 -40
BD7562 family
12V
25
105
90
120
-1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 INPUT VOLTAGE [V]
AMBIENT TEMPERATURE [C]
Fig. 36 Input Offset Voltage - Supply Voltage
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB] 160 140 120
105 -40 85 BD7562 family
Fig. 37 Input Offset Voltage - Ambient Temperature
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB]
COMMON MODE REJECTION RATIO [dB]
Fig. 38 Input Offset Voltage - Input Voltage
(VDD=12[V])
120
85 BD7562 family -40
160 140 120 100 80 60 -60 -30 0 30 60
14.5V
BD7562 family 12V
100 80
105 25
100 80 60 4 8 12
25
60 40 20 0 4 8 12 16 SUPPLY VOLTAGE [V]
5V
16
90
120
SUPPLY VOLTAGE [V]
AMBIENT TEMPERATURE [C]
Fig. 39 Large Signal Voltage Gain - Supply Voltage
COMMON MODE REJECTION RATIO [dB] POWER SUPPLY REJECTION RATIO [dB]
Fig. 40 Large Signal Voltage Gain - Ambient Temperature
200 160 120 80 40 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
BD7562 family
Fig. 41 Common Mode Rejection Ratio - Supply Voltage
(VDD=12[V])
4
BD7562 family
120
12V
BD7562 family 5V
SLEW RATEL-H [V/] SLEW RATE L-H [V/us]
100 80
14.5V
3
14.5V
60 40 20 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
2
1
12V 5V
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
Fig. 42 Common Mode Rejection Ratio - Ambient Temperature
(VDD=12[V])
2.0 SLEW RATE H-L [V/] SLEW RATEH-L[V/us]
BD7562 family
Fig. 43 Power Supply Rejection Ratio - Ambient Temperature
100
Phase
BD7562 family
Fig. 44 Slew Rate L-H - Ambient Temperature
200
1.5 GAIN [dB]
14.5V
80 60 40 20 0 -60 -30 0 30 60 90 120 1.E+00 1.E+02 1.E+04 1.E+06 AMBIENT TEMPERATURE [C] FREQUENCY [Hz]
Gain
150 PHASE (deg) PHASE[deg]
1.0
100
0.5
12V
50
5V
0.0
0 1.E+08
Fig. 45 Slew Rate H-L - Ambient Temperature www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
Fig. 46 Gain - Frequency
BD7562S-40[]+105[]
()The above data is ability value of sample, it is not guaranteed. BD7562-40[]+85[]
8/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7541 family
800 POWER DISSIPATION [mW]
Technical Note
BD7541 family
BD7541 family
800 POWER DISSIPATION [mW]
400 SUPPLY CURRENT [uA] SUPPLY CURRENT [A]
BD7541 family
600
BD7541G
600
BD7541SG
300
-40
25
400
400
200
200
200
100
105
85
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 4 8 12 16 SUPPLY VOLTAGE [V]
Fig. 47 Derating Curve
BD7541 family
Fig. 48 Derating Curve
BD7541 family
Fig. 49 Supply Current - Supply Voltage
BD7541 family
400
16 OUTPUT VOLTAGE HIGH [V]
-40
16 OUTPUT VOLTAGE HIGH [V]
SUPPLY CURRENT [uA] SUPPLY CURRENT [A]
300
14.5V
12
85 25
12
14.5V
200
12V
100
12V
8
105
8
5V
5V
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
4 4 8 12 16 SUPPLY VOLTAGE [V]
4 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
Fig. 50 Supply Current - Ambient Temperature
BD7541 family
Fig. 51 Output Voltage High - Supply Voltage
(RL=10[k])
BD7541 family
Fig. 52 Output Voltage High - Ambient Temperature
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 40
-40 BD7541 family
80 OUTPUT VOLTAGE LOW [mV]
80 OUTPUT VOLTAGE LOW [mV]
60
85
60
14.5V
30
40
105
40
20
85
25
20
25
5V -40
20
12V 5V
10
105
0 4 8 12 16 SUPPLY VOLTAGE [V]
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 8 9 10 11 12 13 OUTPUT VOLTAGE [V]
Fig. 53 Output Voltage Low - Supply Voltage
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 10 8
14.5V BD7541
Fig. 54 Output Voltage Low - Ambient Temperature
(RL=10[k])
50 OUTPUT SINK CURRENT [mA] 40
-40 BD7541 family
Fig. 55 Output Source Current - Output Voltage
(VDD=12[V])
20 OUTPUT SINK CURRENT [mA]
BD7541 family
15
14.5V
6 4 2
5V
30
25
10
12V
12V
20
105
10 0
5
5V
85
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 -1 0 1 2 3 -60 -30 0 30 60 90 120 OUTPUT VOLTAGE [V] AMBIENT TEMPERATURE [C]
Fig. 56 Output Source Current - Ambient Temperature
Fig. 57 Output Sink Current - Output Voltage
(VDD=12[V])
Fig. 58 Output Sink Current - Ambient Temperature
(VOUT=VDD-11.6[V])
()The above data is ability value of sample, it is not guaranteed. BD7541-40[]+85[]
BD7541S-40[]+105[]
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
9/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7541 family
INPUT OFFSET VOLTAGE [mV] 10.0 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 4 8 12 16 SUPPLY VOLTAGE [V]
85 105 -40 25
Technical Note
BD7541 family BD7541 family
BD7541 family
INPUT OFFSET VOLTAGE [mV]
7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
5V 14.5V 12V
INPUT OFFSET VOLTAGE [mV]
10.0
15 10 5 0 -5 -10 -15
85 105 -40 25
-1 0 1 2 3 4 5 6 7 8 9 10 111213 INPUT VOLTAGE [V]
Fig. 59 Input Offset Voltage - Supply Voltage
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB] LARGE SIGNAL VOLTAGE GAIN [dB]
Fig. 60 Input Offset Voltage - Ambient Temperature
(Vicm=VDD, VOUT=VDD/2)
COMMON MODE REJECTION RATIO [dB]
BD7541 family
Fig. 61 Input Offset Voltage - Input Voltage
(VDD=12[V])
120 100 80 60 40 20 0 4 8 12 16 SUPPLY VOLTAGE [V]
85 25 -40 BD7541 family
160 140 120 100 80 60 4 8 12
25 85 105
BD7541 family
160 140 120 100 80 60 -60 -30 0 30 60
12V
105
-40
14.5V 5V
16
90
120
SUPPLY VOLTAGE [V]
AMBIENT TEMPERATURE [C]
Fig. 62 Large Signal Voltage Gain - Supply Voltage
COMMON MODE REJECTION RATIO [dB] POWER SUPPLY REJECTION RATIO [dB]
Fig. 63 Large Signal Voltage Gain - Ambient Temperature
200 160 120 80 40 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
BD7541 family
Fig. 64 Common Mode Rejection Ratio - Supply Voltage
(VDD=12[V])
2.0 SLEW RATE L-H [V/] SLEW RATEL-H [V/us]
BD7541 family
120 100 80 60 40 20 0 -60 -30 0 30 60
12V 14.5V
BD7541 family
1.5
14.5V
5V
1.0
0.5
12V 5V
0.0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
90
120
AMBIENT TEMPERATURE [C]
Fig. 65 Common Mode Rejection Ratio - Ambient Temperature
(VDD=12[V])
1.0
BD7541 family
Fig. 66 Power Supply Rejection Ratio - Ambient Temperature
100
Phase
BD7541 family
Fig. 67 Slew Rate L-H - Ambient Temperature
200
SLEW RATEH-L [V/us] SLEW RATE H-L [V/]
0.8 GAIN [dB] 0.6 0.4 0.2 0.0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
12V 5V 14.5V
80 60 40 20 0 1.E+00 1.E+02 1.E+04 1.E+06 FREQUENCY [Hz]
Gain
150 PHASE (deg) PHASE[deg]
100
50
0 1.E+08
Fig. 68 Slew Rate H-L - Ambient Temperature
Fig. 69 Gain - Frequency
()The above data is ability value of sample, it is not guaranteed. BD7541-40[]+85[] BD7541S-40[]+105[]
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
10/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7542 family
800 POWER DISSIPATION [mW]
BD7542F
Technical Note
BD7542 family BD7542 family
BD7542 family
800 POWER DISSIPATION [mW]
800 SUPPLY CURRENT [uA]
600
600
BD7542SF
600
25
-40
BD7542FVM
400
400
BD7542SFVM
400
85 105
200
200
200
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 0 50 100 150 AMBIENT TEMPERATURE [C]
0 4 8 12 16 SUPPLY VOLTAGE [V]
Fig. 70 Derating Curve
BD7542 family
Fig. 71 Derating Curve
BD7542 family
Fig. 72 Supply Current - Supply Voltage
BD7542 family
800 SUPPLY CURRENT [uA]
14.5V
16 OUTPUT VOLTAGE HIGH [V]
-40
16 OUTPUT VOLTAGE HIGH [V]
600
12
85 25
12
14.5V
400
12V 5V
12V
8
105
8
5V
200
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
4 4 8 12 16 SUPPLY VOLTAGE [V]
4 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
Fig. 73 Supply Current - Ambient Temperature
BD7542 family
Fig. 74 Output Voltage High - Supply Voltage
(RL=10[k])
BD7542 family
Fig. 75 Output Voltage High - Ambient Temperature
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 40
-40 BD7542 family
80 OUTPUT VOLTAGE LOW [mV]
80 OUTPUT VOLTAGE LOW [mV]
60
85
60
14.5V
30
40
105
25
40
20
85 105
20
25 -40
20
12V 5V
10
0 4 8 12 16 SUPPLY VOLTAGE [V]
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
0 8 9 10 11 12 13 OUTPUT VOLTAGE [V]
Fig. 76 Output Voltage Low - Supply Voltage
(RL=10[k])
OUTPUT SOURCE CURRENT [mA] 10 8 6 4 2 0 -60 -30 0
5V 14.5V BD7542 family
Fig. 77 Output Voltage Low - Ambient Temperature
(RL=10[k])
50 OUTPUT SINK CURRENT [mA] 40
-40 BD7542 family
Fig. 78 Output Source Current - Output Voltage
(VDD=12[V])
20 OUTPUT SINK CURRENT [mA]
BD7542 family
15
14.5V
30
25
10
12V
12V
20
85
10
105
5
5V
0 60 90 120 -1 0 1 2 3 OUTPUT VOLTAGE [V]
0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
30
AMBIENT TEMPERATURE [C]
Fig. 79 Output Source Current - Ambient Temperature
(VOUT=VDD-0.4[V])
Fig. 80 Output Sink Current - Output Voltage
(VDD=12[V])
Fig. 81 Output Sink Current - Ambient Temperature
(VOUT=VDD-11.6[V])
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[]
BD7561S-40[]+105[]
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
11/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM BD7542 family
INPUT OFFSET VOLTAGE [mV] 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 4 8 12 16 SUPPLY VOLTAGE [V]
85 105 -40 25
Technical Note
INPUT OFFSET VOLTAGE [mV]
7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
5V 14.5V 12V
INPUT OFFSET VOLTAGE [mV]
10.0
BD7542 family
10.0
BD7542 family
15 10 5 0 -5 -10 -15
85 -40
BD7542 family
25
105
-1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 INPUT VOLTAGE [V]
Fig. 82 Input Offset Voltage - Supply Voltage
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB] 160 140 120 100 80 60 4 8 12 16 SUPPLY VOLTAGE [V]
25 85 -40 105 BD7542 family
Fig. 83 Input Offset Voltage - Ambient Temperature
(Vicm=VDD, VOUT=VDD/2)
LARGE SIGNAL VOLTAGE GAIN [dB] LARGE SIGNAL VOLTAGE GAIN [dB]
COMMON MODE REJECTION RATIO [dB]
BD7542 family
Fig. 84 Input Offset Voltage - Input Voltage
(VDD=12[V])
120 100 80 60 40 20 0 4 8 12 16 SUPPLY VOLTAGE [V]
85 105 -40 BD7542 family 25
160 140 120 100 80 60 -60 -30 0 30 60
5V 14.5V
12V
90
120
AMBIENT TEMPERATURE [C]
Fig. 85 Large Signal Voltage Gain - Supply Voltage
COMMON MODE REJECTION RATIO [dB]
12V
Fig. 86 Large Signal Voltage Gain - Ambient Temperature
POWER SUPPLY REJECTION RATIO [dB]
Fig. 87 Common Mode Rejection Ratio - Supply Voltage
(VDD=12[V])
2.0
BD7542 family
120 100 80
BD7542 family
200 160 120 80 40 0 -60 -30 0 30 60
BD7542 family
SLEW RATEL-H[V/us] SLEW RATE L-H [V/]
1.5
14.5V
14.5V
60 40 20 0 -60 -30 0 30 60
5V
1.0
0.5
12V 5V
0.0 90 120 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C] AMBIENT TEMPERATURE [C]
90
120
AMBIENT TEMPERATURE [C]
Fig. 88 Common Mode Rejection Ratio - Ambient Temperature
(VDD=12[V])
1.0
BD7542 family
Fig. 89 Power Supply Rejection Ratio - Ambient Temperature
100
Phase
BD7542 family
Fig. 90 Slew Rate L-H - Ambient Temperature
200
SLEW RATEH-L[V/us] SLEW RATE H-L [V/]
0.8 0.6 0.4 0.2 0.0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [C]
12V 5V 14.5V
80 GAIN [dB] 60 40 20 0 1.E+00 1.E+02 1.E+04 1.E+06 FREQUENCY [Hz]
Gain
150 PHASE (deg) PHASE[deg]
100
50
0 1.E+08
Fig. 91 Slew Rate H-L - Ambient Temperature
Fig. 92 Gain - Frequency
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[] BD7561S-40[]+105[]
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
12/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM Schematic diagram
Technical Note
Fig. 93. Schematic diagram Test circuit1 NULL method VDD,VSS,EK,Vicm Unit : [V] Parameter Input Offset Voltage Large Signal Voltage Gain Common-mode Rejection Ratio (Input Common-mode Voltage Range) Power Supply Rejection Ratio VF VF1 VF2 VF3 VF4 VF5 VF6
VF7
S1 ON ON ON ON
S2 ON ON ON ON
S3 OFF ON OFF OFF
VDD 12 12 12 5
14.5
VSS 0 0 0 0
EK -6 -0.5 -11.5 -6 -2.5
Vicm 12 6 0 12 0
Calculation 1 2 3 4
-Calculation1. Input Offset Voltage (Vio)
Vio =
|VF1| 1+Rf/Rs
[V]
2. Large Signal Voltage Gain (Av)
Av = 20Log
2x(1+Rf/Rs) |VF2-VF3|
[dB]
3. Common-mode Rejection Ratio (CMRR)
CMRR = 20Log
1.8x(1+Rf/Rs) |VF4-VF5| 3.8x(1+Rf/Rs) |VF6-VF7|
[dB]
4. Power Supply Rejection Ratio (PSRR)
PSRR = 20Log
[dB]
0.1[F]
Rf=50[k] SW1 RS 50[] Ri=1[M] 0.015[F] DUT SW3 RL SW2 50[k] 1000[pF] VF -15[V]
VDD
EK Vo
500[k]
+
0.01[F] 15[V]
500[k] 0.015[F] RS 50[] Vicm NULL
Ri=1[M]
VSS
VRL
Fig. 94. Test circuit 1 (one channel only)
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13/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM Test circuit2 switch condition Unit : [V] SW No. Supply Current Maximum Output Voltage RL=10 [k] Output Current Slew Rate Maximum Frequency SW 1 OFF OFF OFF OFF ON SW 2 OFF ON ON OFF OFF SW 3 ON OFF OFF ON OFF SW 4 OFF OFF OFF OFF ON SW 5 ON ON ON OFF ON SW 6 OFF OFF OFF OFF OFF
VIN [V]
Technical Note
SW 7 OFF OFF OFF ON OFF
SW 8 OFF ON OFF OFF OFF
SW 9 OFF OFF OFF ON ON
SW 10 OFF OFF ON OFF OFF
SW 11 OFF ON OFF OFF OFF
SW 12 OFF OFF OFF ON ON
12[V]
SW3 SW4 R2 100[k]
12[V P-P]
VDD=3[V]
0[V]
Input waveform
SW1 SW2 SW5 R1 1[k] GND RL CL Vo SW6 SW7
t
VOUT [V]
SW8 SW9 SW10 SW11 SW12
SR= V / t
12[V]
V 0[V] t
VIN-
VIN+
Output waveform Fig. 95.. Test circuit2 Fig. 96.. Slew rate input output wave
t
Test circuit3 Channel separation
R2=100[k]
R2=100[k]
R1=1[k]
VDD
R1=1[k]
VDD
V VIN R1//R2
VSS
VOUT1 =1[Vrms]
R1//R2
VSS
V VOUT2
CS=20Log
100xVOUT1 VOUT2
Fig. 97.. Test circuit3
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14/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
Description of electrical characteristics Described here are the terms of electric characteristics used in this technical note. Items and symbols used are also shown. Note that item name and symbol and their meaning may differ from those on another manufacture's document or general document. 1. Absolute maximum ratings Absolute maximum rating item indicates the condition which must not be exceeded. Application of voltage in excess of absolute maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics. 1.1 Power supply voltage (VDD/VSS) Indicates the maximum voltage that can be applied between the positive power supply terminal and negative power supply terminalwithout deterioration or destruction of characteristics of internal circuit. 1.2 Differential input voltage (Vid) Indicates the maximum voltage that can be applied between non-inverting terminal and inverting terminal without deterioration and destruction of characteristics of IC.
1.3 Input common-mode voltage range (Vicm) Indicates the maximum voltage that can be applied to non-inverting terminal and inverting terminal without deterioration or destruction of characteristics. Input common-mode voltage range of the maximum ratings not assure normal operation of IC. When normal Operation of IC is desired, the input common-mode voltage of characteristics item must be followed. 1.4 Power dissipation (Pd) Indicates the power that can be consumed by specified mounted board at the ambient temperature 25( normal temperature). As for package product, Pd is determined by the temperature that can be permitted by IC chip in the package(maximum junction temperature)and thermal resistance of the package. 2. Electrical characteristics item 2.1 Input offset voltage (Vio) Indicates the voltage difference between non-inverting terminal and inverting terminal. It can be translated into the input voltage difference required for setting the output voltage at 0 [V]. 2.2 Input offset current (Iio) Indicates the difference of input bias current between non-inverting terminal and inverting terminal. 2.3 Input bias current (Ib) Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias current at non-inverting terminal and input bias current at inverting terminal. 2.4 Circuit current (ICC) Indicates the IC current that flows under specified conditions and no-load steady status. 2.5 High level output voltage / Low level output voltage(VOH/VOL) Indicates the voltage range that can be output by the IC under specified load condition. It is typically divided into high-level output voltage and low-level output voltage. High-level output voltage indicates the upper limit of output voltage. Low-level output voltage indicates the lower limit. 2.6 Large signal voltage gain (AV) Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting terminal and inverting terminal.It is normally the amplifying rate (gain) with reference to DC voltage. Av = (Output voltage fluctuation) / (Input offset fluctuation) 2.7 Input common-mode voltage range (Vicm) Indicates the input voltage range where IC operates normally. 2.8 Common-mode rejection ratio (CMRR) Indicates the ratio of fluctuation of input offset voltage when in-phase input voltage is changed. It is normally the fluctuation of DC. CMRR (Change of Input common-mode voltage)/(Input offset fluctuation) 2.9 Power supply rejection ratio (PSRR) Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. It is normally the fluctuation of DC. PSRR(Change of power supply voltage)/(Input offset fluctuation) 2.10 Channel separation(CS) Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage of driven channel.
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15/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
2.11 Slew rate (SR) Indicates the time fluctuation ratio of voltage output when step input signal is applied. 2.12 Unity gain frequency (ft) Indicates a frequency where the voltage gain of Op-Amp is 1. 2.13 Total harmonic distortion + Noise (THDN) Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage of driven channel. 2.14 Input referred noise voltage (Vn) Indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected in series with input terminal. Derating curve Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25(normal temperature). IC is heatedwhen it consumed power, and the temperature of IC ship becomes higher than ambient temperature. The temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited. Power dissipation is determined by the temperature allowed in IC chip (maximum junction temperature) and thermal resistance of package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the storage package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead frame of the package. The parameter which indicates this heat dissipation capability (hardness of heat release) is called thermal resistance, represented by the symbol j-a[/W]. The temperature of IC inside the package can be estimated by this thermal resistance. Fig.98 (a) shows the model of thermal resistance of the package. Thermal resistance ja, ambient temperature Ta, junction temperature Tj, and power dissipation Pd can be calculated by the equation below : ja (Tj-Ta) / Pd [/W] () Derating curve in Fig.98 (b) indicates power that can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC begins to attenuate at certain ambient temperature. This gradient iis determined by thermal resistance ja. Thermal resistance ja depends on chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc even when the same of package is used. Thermal reduction curve indicates a reference value measured at a specified condition. Fig99(c)-(f) show a derating curve for an example of BU7561family, BU7562family, 7541family, 7542family.
Power dissipation of LSI [W]
Pd(max)
LSI[W]
ja (Tj Ta) / Pd [ /W]
Ambient temperature Ta []
Ta[ ] Ta[ ]
P2 ja2 Package surface temperature []
P1
ja2 Tj(max)
ja1
Tj[ Chip surface temperature Tj [] ]
0
25
50
75
100
125
150
Power dissipation P [W] P[W]
Ambient temperature ] [] Ta[ Ta
(a) Thermal resistance
BD7561/BD7541 Tj(max)
(b) Derating curve Fig. 98. Thermal resistance and derating
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16/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
800 POWER DISSIPATION [mW] .
1000 POWER DISSIPATION [mW] .
600
540[mw BD7561G(*8) BD7541G(*8)
800
620[mw] BD7562F(*9 BD7542F(*9
600
400
480[mw] BD7562FVM(*10) BD7542FVM(*10)
400
200
200
0 0
0
85 100 50 AMBIENT TEMPERATURE []
150
0
50
85 100
150
AMBIENT TEMPERATURE []
(c) BD7561G
800 POWER DISSIPATION [mW] .
(d) BD7562F/FVM BD7542F/FVM
1000 POWER DISSIPATION [mW] .
800
600
540[mw
620[mw]
BD7561SG(*8) BD7541SG(*8)
BD7562SF(*9 BD7542SF(*9
600
480[mw] BD7562SFVM(*10) BD7542SFVM(*10)
400
400
200
200
0 0 50
0
100 105 150
0
50
100
105
150
AMBIENT TEMPERATURE []
AMBIENT TEMPERATURE []
(e) BD7561SG
(f) BD7562S F/FVM BD7542S F/FVM
(*8) 5.4
(*9) 6.2
(*10) 4.8
Unit [mW/]
When using the unit above Ta=25[], subtract the value above per degree[]. Permissible dissipation is the value when FR4 glass epoxy board 70[mm]x70[mm]x1.6[mm] (cooper foil area below 3[]) is mounted.
Fig. 99. Derating curve
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17/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
N0tes for use 1) Absolute maximum ratings Absolute maximum ratings are the values which indicate the limits,within which the given voltage range can be safely charged to the terminal.However, it does not guarantee the circuit operation. 2) Applied voltage to the input terminal For normal circuit operation of voltage comparator, please input voltage for its input terminal within input common mode voltage VDD+0.3[V].Then, regardless of power supply voltage,VSS-0.3[V] can be applied to inputterminals without deterioration or destruction of its characteristics. 3) Operating power supply (split power supply/single power supply) The voltage comparator operates if a given level of voltage is applied between VDD and VSS. Therefore, the operational amplifier can be operated under single power supply or split power supply. 4) Power dissipation (Pd) If the IC is used under excessive power dissipation. An increase in the chip temperature will cause deterioration of the radical characteristics of IC. For example, reduction of current capability. Take consideration of the effective power dissipation andthermal design with a sufficient margin. Pd is reference to the provided power dissipation curve.
5) Short circuits between pins and incorrect mounting Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board, take notice of the direction and positioning of the IC.If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between output, between output and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged. 6) Using under strong electromagnetic field Be careful when using the IC under strong electromagnetic field because it may malfunction. 7) Usage of IC When stress is applied to the IC through warp of the printed circuit board, The characteristics may fluctuate due to the piezo effect. Be careful of the warp of the printed circuit board. 8) Testing IC on the set board When testing IC on the set board, in cases where the capacitor is connected to the low impedance,make sure to discharge per fabrication because there is a possibility that IC may be damaged by stress. When removing IC from the set board, it is essential to cut supply voltage.As a countermeasure against the static electricity, observe proper grounding during fabrication processand take due care when carrying and storage it. 9) The IC destruction caused by capacitive load The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged output terminal capacitor. When IC is used as a operational amplifier or as an application circuit,where oscillation is not activated by an output capacitor, the output capacitor must be kept below 0.1[F] in order to prevent the damage mentioned above. 10) Decupling capacitor Insert the deculing capacitance between VDD and VSS, for stable operation of operational amplifier. 11) Latch up Be careful of input vltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up operation. And protect the IC from abnormaly noise.
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18/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM Ordering part number
Technical Note
B
D
7
5
6
2
F
V
M
-
T
R
7561 , 7561S 7541 , 7541S 7562 , 7562S 7542 , 7542S
G: SSOP5 F: SOP8 FVM: MSOP8
Packaging and forming specification E2: Embossed tape and reel (SOP8) TR: Embossed tape and reel (SSOP5/MSOP8)
SOP8

5.00.2 (MAX 5.35 include BURR)
8 7 6 5
+6 4 -4
Tape Quantity
0.90.15 0.3MIN
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.20.3
4.40.2
Direction of feed
( reel on the left hand and you pull out the tape on the right hand
)
12
3
4
0.595
1.50.1
+0.1 0.17 -0.05 S
0.11
1.27 0.420.1
1pin
(Unit : mm)
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
SSOP5
2.90.2
5 4
+6 4 -4

Tape Quantity Direction of feed Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
+0.2 1.6 -0.1
2.80.2
1
2
3
0.2Min.
( reel on the left hand and you pull out the tape on the right hand
1pin
)
+0.05 0.13 -0.03
1.25Max.
1.10.05
0.050.05
+0.05 0.42 -0.04 0.95 0.1
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
19/20
2009.05 - Rev.A
BD7561G,BD7561SG,BD7541G,BD7541SG, BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
MSOP8

2.90.1 (MAX 3.25 include BURR)
8765
Tape
0.290.15 0.60.2
+6 4 -4
Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
Quantity Direction of feed
4.00.2
2.80.1
( reel on the left hand and you pull out the tape on the right hand
1pin
)
1 234
1PIN MARK 0.475 S +0.05 0.22 -0.04 0.08 S 0.65
+0.05 0.145 -0.03
0.9MAX 0.750.05
0.080.05
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
20/20
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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http://www.rohm.com/contact/
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